Project Description

Job Requirements

  • A track record as a team player and capable of leading teams.
  • Proven experience in developing and meeting engineering schedules.
  • Strong analytical skills.
  • Strong organizational, interpersonal, written and verbal communication skills.

Job Responsibilities

  • Responsibilities include all technical aspects of design from feasibility to specification to monitoring layout of the design, tape out and silicon validation.
  • This will require interaction with customer to understand customer requirements, develop product specification and to provide technical support.
  • Besides close interaction with the design team, the engineer is expected to support and guide the layout team.
  • Proper documentation will have to be provided throughout including a detailed test plan for the validation of the design/IP.

Other Requirements

  • Thorough understanding of detailed analog circuit design and the ability to design independently various functional blocks.
  • Detailed knowledge in the design and operation of the following analog blocks:
    • Basic Analog building blocks (op amps, comparators, current sources, currentmirrors, voltage references).
    • Power management blocks (bandgap references, linear regulators, DC-DC converter of various topologies, LDOs).
    • System level protection blocks (UVLO, POR, OTP, Short circuit protection etc).
    • PLL and transceiver blocks (output drivers, multiplexer and de-multiplexer, clock generator, equalizers, clock and data recovery, frequency detectors, oscillators, filters).
    • ADCs and DACs.
  • In-depth understanding of leading process technologies such as sub-micron CMOS/BiCMOS/DMOS, BCD, HV.
  • Experience with design practices such as minimizing device mismatch, noise, signal coupling,ESD, latchup and device SOA is a must.
  • Experience with simulation tools required to efficiently simulate analog/mixed-signal circuits e.g. Spectre, Ultrasim, HSpice, etc.
  • Understanding of simulation models, design rules and verification procedures (DRC/LVS/ERC) is essential.
  • Modelling and design skills in Verilog-A/Verilog-AMS and system modelling with Matlab is an added advantage.
  • Experience in IO interface circuit design and analysis.
  • Exposed to High Speed IOs e.g. USB2, LVDS, PCIE, Serdes, MIPI.

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